T O N  T O U C  A L A R M
This device is our proposition for an upgrade of an elegant touch sensor concept popularized by David Johnson. The original circuit used one half of inexpensive CD4013 flip-flop to produce two parallel propagating pulses and then exploited the other half of the same IC to measure very small delays in the time of arrival of one of the pulses caused by parasitic capacitance of person touching the pad.
Although this works well in theory and gives a lot of room for practical experimentation, there is a problem that doesn’t let the circuit to be used as a serious door knob alarm. The problem is relatively high sensitivity of the circuit to electrical interferences that occasionally trigger the alarm without anyone touching the wired object. It can be ameliorated to a certain degree by lowering the sensitivity of the circuit but at the point at which pulses from the environment seem to have stopped being frustrating, it becomes very hard to make the circuit respond to actual human touches. We decided to do something about this as the core of the circuit is a gem and it would be a real shame not to let it shine as it deserves.
The solution we propose is adding one more digital IC to the existing design, which will serve to filter the touch sensor output so that only if active signal state lasts longer than a predefined time, it lets it pass the barrier and trigger the tone alarm circuit. There are numerous ways to implement this; we believe that the method we have chosen is not only one of the least expensive but also very robust and quite amusing to analyse and discuss.
Tone touch alarm by LP circuit diagram
A quick glance at the diagram above reveals that the key component is a venerable CD4060 timer-counter. This IC contains RC oscillator together with a 14-stage of binary counter, each stage dividing the output of the previous one by the factor of 2. This configuration provides a means to precisely generate a broad spectrum of frequencies (timed intervals) inside the same IC which gives us not merely enough room to precisely define the condition under which alarm triggering occurs but as well an opportunity to generate nicely shaped alarm tone.
Let’s analyse the triggering process first. To reset CD4060, positive voltage pulse has to be fed to its reset input pin 12. In a reset state, all IC1 outputs (Q-pins) are logic low (0V); as soon as the reset pulse disappears from pin 12, it starts to oscillate and count so that binary value (binary number) one can observe at its outputs gradually increases over time. For those readers less versed to binary logic, the meaning of Q-denominations on output pins represents their respective “power of 2 degree”. If for example an output is designated “Q5” that means that it inverts its logic value after each 2^5 = 32 oscillator pulses - in other words, it divides oscillator frequency by the factor of 32. As there are 14 stages of such counters in a single CD4060 IC, this means that it is able to count from 0 up to 2^14 - 1 = 16383 before it rolls over to 0 and starts counting anew.
In this particular circuit resetting to all-zero state takes place when output Q8 becomes logic high and neither D6 nor Q1 prevent the positive pulse from reaching pin 12. Q1 needs at least one of Q12, Q13 or Q14 outputs to be logic high in order to be active, which means that after powering the circuit up only D6 can help IC to break out the magic circle of resetting itself after each 2^8 = 256 oscillator pulses. In other words, only if IC2A output Q becomes logic low will the IC1 be able to try to break the spell and do something interesting.
So, what makes flip-flop A pull its Q output to 0V? More experienced readers will easily recognize a classical David Johnson’s circuit here. One can observe two parallel delay lines leading from IC1 output Q7 into CLK and DATA inputs of IC2A. The one with the constant delay, formed out of R5 and C2, passes positive going pulse edges coming from IC1 Q7 output into CLK input. At that precise moment IC2A samples the voltage at its DATA input. If no person is in contact with the touch sensitive surface, the effective capacitance between DATA input and circuit ground is small so pulses coming from Q7 arrive a split second sooner into DATA than those going into CLK input. This means that IC2A observes logic high at its DATA input and consequently puts its Q output into logic high state (+Vcc). Therefore, with no touch, IC2A is high and IC1 resets itself perpetually.
If someone touches the surface, effective capacitance between IC2A DATA input and circuit ground is high enough so that those pulses are delayed a bit more than those going into CLK input, having as a consequence IC2A sampling logic low and turning its Q output low. Thanks to D6, this prevents IC1 from self-resetting. Sensitivity of the touch circuit can be adjusted by setting the resistive part of DATA delay line to a certain optimal value so that DATA pulses are being delayed a bit less than CLK pulses without anyone touching the surface, and a bit more with someone in contact. Capacitance of human body is around 50pF, so P1 set to middle position is a good starting point.
Please note that the circuit is sensitive to capacitances between DATA input and CIRCUIT GROUND - this means that it is necessary to mount the whole circuit physically in such a way so that it be in the proximity of the person touching the loop. For example, gluing it onto the door from the inside is a good idea if one wants to be warned about doorknob touches.
designed by LP 2014